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is31ap2005 integrated silicon solution, inc. ? www.issi.com 1 rev.b, 12/11/2012 2.95w mono filter-less class-d audio power amplifier december 2012 general description the is31ap2005 is a high efficiency, 2.95w mono class-d audio power amplifier. a low noise, filter-less pwm architecture eliminates the output filter, reducing external component count, system cost, and simplifying design. operating in a single 5v supply, is31ap2005 is capable of driving 4 ? speaker load at a continuous average output of 2.95w with 10% thd+n. the is31ap2005 has high efficiency with speaker load compared to a typical class-ab amplifier. in cellular handsets, the earpiece, speaker phone, and melody ringer can each be driven by the is31ap2005. the gain of is31ap2005 is externally configurable which allows independent gain control from multiple sources by summing signals from each function. the is31ap2005 is available in dfn-8 and msop-8 packages. features ? 5v supply at thd = 10% -2.95w into 4 ? (typ.) -1.70w into 8 ? (typ.) ? efficiency at 5v: -83% at 400mw with a 4 ? speaker -89% at 400mw with an 8 ? speaker ? optimized pwm output stage eliminates lc output filter ? fully differential design reduces rf rectification and eliminates bypass capacitor ? integrated pop-and-click suppression circuitry ? short-circuit and thermal protect ? 3mm 3mm dfn-8 and msop-8 package ? rohs compliant and 100% lead(pb)-free applications ? wireless or cellular handsets and pdas ? portable dvd player ? notebook pc ? portable radio ? educational toys ? usb speakers ? portable gaming typical application circuit figure 1 typical application circuit with differential input
is31ap2005 integrated silicon solution, inc. ? www.issi.com 2 rev.b, 12/11/2012 figure 2 typical application schematic with single-ended input
is31ap2005 integrated silicon solution, inc. ? www.issi.com 3 rev.b, 12/11/2012 pin configuration package pin configuration (top view) dfn-8 msop-8 pin description no. pin description dfn-8 msop-8 1 sdb shutdown terminal, active low logic. 2 nc no internal connection. 3 in+ positive differential input. 4 in- negative differential input. 5 out+ positive btl output. 6 vcc power supply. 7 gnd high-current ground. 8 out- negative btl output. - thermal pad connect to gnd.
is31ap2005 integrated silicon solution, inc. ? www.issi.com 4 rev.b, 12/11/2012 ordering information industrial range: -40c to +85c order part no. package qty/reel IS31AP2005-DLS2-TR is31ap2005-sls2-tr dfn-8, lead-free msop-8, lead-free 2500 copyright ? ? ? 2012 ? integrated ? silicon ? solution, ? inc. ? all ? rights ? reserved. ? issi ? reserves ? the ? right ? to ? make ? changes ? to ? this ? specification ? and ? its ? products ? at ? any ? time ? without ? notice. ? issi ? assumes ? no ? liability ? arising ? out ? of ? the ? application ? or ? use ? of ? any ? information, ? products ? or ? services ? described ? herein. ? customers ? are ? advised ? to ? obtain ? the ? latest ? version ? of ? this ? device ? specification ? before ? relying ? on ? any ? published ? information ? and ? before ? placing ? orders ? for ? products. ? integrated ? silicon ? solution, ? inc. ? does ? not ? recommend ? the ? use ? of ? any ? of ? its ? products ? in ? life ? support ? applications ? where ? the ? failure ? or ? malfunction ? of ? the ? product ? can ? reasonably ? be ? expected ? to ? cause ? failure ? of ? the ? life ? support ? system ? or ? to ? significantly ? affect ? its ? safety ? or ? effectiveness. ? products ? are ? not ? authorized ? for ? use ? in ? such ? applications ? unless ? integrated ? silicon ? solution, ? inc. ? receives ? written ? assurance ? to ? its ? satisfaction, ? that: ? a.) ? the ? risk ? of ? injury ? or ? damage ? has ? been ? minimized; ? b.) ? the ? user ? assume ? all ? such ? risks; ? and ? c.) ? potential ? liability ? of ? integrated ? silicon ? solution, ? inc ? is ? adequately ? protected ? under ? the ? circumstances
is31ap2005 integrated silicon solution, inc. ? www.issi.com 5 rev.b, 12/11/2012 absolute maximum ratings supply voltage, v cc - 0.3v ~ +6.0v voltage at any input pin - 0.3v ~ v cc +0.3v maximum junction temperature, t jmax 150c storage temperature range, t stg - 65c ~ +150c operating temperature range, t a ? 40c ~ +85c note: stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress rating s only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the sp ecifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. electrical characteristics v cc = 2.7v ~ 5.5v, t a = 25c, unless otherwise noted. (note 1) symbol parameter condition min. typ. max. unit v cc supply voltage 2.7 5.5 v os v output offset voltage (measured differentially) v sdb = 0v, a v = 2v/v 10 mv i cc quiescent current v cc = 5.5v, no load 2.6 ma v cc = 2.7v, no load 1.2 i sd shutdown current v sdb = 0.4v 1 a f sw switching frequency 250 khz r in input resistor gain ? ? gain audio input gain r in = 150k ? 2 v/v v ih high-level input voltage 1.4 v v il low-level input voltage 0.4 v
is31ap2005 integrated silicon solution, inc. ? www.issi.com 6 rev.b, 12/11/2012 electrical characteristics t a = 25c, gain= 2v/v. (note 2) symbol parameter condition min. typ. max. unit p o output power thd+n = 10% f = 1khz, r l = 8 ? v cc = 5.0v 1.70 w v cc = 4.2v 1.20 v cc = 3.6v 0.83 thd+n = 10% f = 1khz, r l = 4 ? v cc = 5.0v 2.95 w v cc = 4.2v 2.05 v cc = 3.6v 1.55 thd+n = 1% f = 1khz, r l = 8 ? v cc = 5.0v 1.45 w v cc = 4.2v 0.95 v cc = 3.6v 0.66 thd+n=1% f = 1khz, r l = 4 ? v cc = 5.0v 2.50 w v cc = 4.2v 1.70 v cc = 3.6v 1.25 thd+n total harmonic distortion plus noise v cc = 5.0v, p o =1.0w, r l = 8 ? , f = 1khz 0.28 % v cc = 5.0v, p o =1.2w, r l = 4 ? , f = 1khz 0.31 v n output voltage noise v cc = 3.6v~5v, f =20hz to 20khz, inputs ac-grounded with c in = 1 f a-weighting 68 vrms t wu wake-up time from shutdown v cc = 3.6v 36 ms snr signal-to-noise ratio p o =1.0w, r l = 8 ? , v cc = 5.0v 92 db psrr power supply rejection ratio v cc = 3.6v ~ 5.5v, f = 217khz -65 db note 1: all parts are production tested at t a = 25c. other temperature limits are guaranteed by design. note 2: guaranteed by design.
is31ap2005 integrated silicon solution, inc. ? www.issi.com 7 rev.b, 12/11/2012 typical performance characteristics thd+n(%) output power(w) 20 0.1 0.2 0.5 1 2 5 10 10m 3 20m 50m 100m 200m 500m 12 r l = 8 ? +33h f = 1khz v cc = 3.6v v cc = 4.2v v cc = 5.0v figure 3 thd+n vs. output power 0.01 0.02 0.05 0.1 0.2 1 2 10 thd+n(%) 20 20k 50 100 200 500 1k 2k 5k 10k frequency(h z) 20 v cc = 3.6v p o = 500mw v cc = 5.0v p o = 1w r l = 8 ? +33h figure 5 thd+n vs. frequency output voltage(uv) 20 20k 50 100 200 1k 2k 5k 10k frequency(hz) 10 200 20 30 50 70 100 v cc = 3.6v~5.0v r l = 8 ? +33h figure 7 noise thd+n(%) output power(w) 20 0.1 0.2 0.5 1 2 5 10 10m 3 20m 50m 100m 200m 500m 12 4 r l = 4 ? +33h f = 1khz v cc = 3.6v v cc = 4.2v v cc = 5.0v figure 4 thd+n vs. output power 0.01 0.02 0.05 0.1 0.2 1 2 10 thd+n(%) 20 20k 50 100 200 500 1k 2k 5k 10k frequency(h z) 20 r l = 4 ? +33h v cc = 3.6v p o = 650mw v cc = 5.0v p o = 1.2w figure 6 thd+n vs. frequency frequency(hz) psrr(db) -100 0 -80 -60 -40 -20 20 20k 50 100 200 500 1k 2k 5k v cc = 3.6v~5.0v r l = 8 ? +33 h input grounded figure 8 psrr vs. frequency
is31ap2005 integrated silicon solution, inc. ? www.issi.com 8 rev.b, 12/11/2012 power supply(v) output power(w) 2.5 3 3.5 4 4.5 5 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 r l = 8 ? +33 h f = 1khz thd+n = 1% thd+n = 10% figure 9 output power vs. supply voltage output power(w) efficiency(%) 100 80 60 40 20 0 0 0.4 0.8 1.2 1.6 2 2.4 2.8 r l =8 ? r l =4 ? v cc = 5v gain=2v/v figure 11 efficiency vs. output power power supply(v) output power(w) 2.5 3 3.5 4 4.5 5 0 0.5 1 1.5 2 2.5 3 3.5 r l = 4 ? +33 h f = 1khz thd+n = 10% thd+n = 1% figure 10 output power vs. supply voltage
is31ap2005 integrated silicon solution, inc. ? www.issi.com 9 rev.b, 12/11/2012 functional block diagram
is31ap2005 integrated silicon solution, inc. ? www.issi.com 10 rev.b, 12/11/2012 application information fully differential amplifier the is31ap2005 is a fully differential amplifier with differential inputs and outputs. the fully differential amplifier consists of a differential amplifier and a common-mode amplifier. the differential amplifier ensures that the amplifier outputs a differential voltage on the output that is equal to the differential input times the gain. the common-mode feedback ensures that the common-mode voltage at the output is biased around v cc /2 regardless of the common-mode voltage at the input. the fully differential is31ap2005 can still be used with a single-ended input; however, the is31ap2005 should be used with differential inputs when in a noisy environment, like a wireless handset, to ensure maximum noise rejection. advantages of fully differential amplifiers the fully differential amplifier does not require a bypass capacitor. this is because any shift in the midsupply affects both positive and negative channels equally and cancels at the differential output. gsm handsets save power by turning on and shutting off the rf transmitter at a rate of 217hz. the transmitted signal is picked-up on input and output traces. the fully differential amplifier cancels the signal much better than the typical audio amplifier. component selection figure 12 shows the is31ap2005 with differential inputs and optional input capacitors. input capacitors are used when the common mode input voltage range specs can not be guaranteed or high pass filter is considered. figure 13 shows the is31ap2005 with single-ended inputs. the input capacitors have to be used in the single ended case because it is much more susceptible to noise in this case. out+ gnd is31ap2005 6 8 5 vcc out- c s 1 f v battery 4 in- in+ 3 0.1 f 7 sdb 1 100k c in+ 0.1 f c in- 0.1 f r in+ 150k r in- 150k differential input shutdown control figure 12 typical application circuit with differential input out+ gnd is31ap2005 vcc out- c s 1 f v battery in- in+ 0.1 f sdb 100k c in- 0.1 f c in+ 0.1 f r in- 150k r in+ 150k shutdown control single-ended input 6 8 5 4 3 7 1 figure 13 typical application circuit with single-ended input input resistors (r in ) the input resistors (r in ) set the gain of the amplifier according to equation (1). in r ain ? ? ? 0k 5 1 2 g ? ? ? ? ? ? v v (1) resistor matching is very important in fully differential amplifiers. the balance of the output on the reference voltage depends on matched ratios of the resistors. cmrr, psrr, and cancellation of the second harmonic distortion diminish if resistor mismatch occurs. therefore, it is recommended to use 1% accuracy resistors or better to keep the performance optimized. matching is more important than overall accuracy. place the input resistors close to the is31ap2005 to reduce noise injection on the high-impedance nodes. for optimal performance the gain should be set to 2v/v or lower. lower gain allows the is31ap2005 to operate at its best, and keeps a high voltage at the input making the inputs less susceptible to noise. decoupling capacitor (c s ) the is31ap2005 is a high-performance class-d audio amplifier that requires adequate power supply decoupling to ensure high efficiency and low total harmonic distortion (thd). for higher frequency transients, spikes, or digital noises on the line, a good low equivalent-series-resistance (esr) ceramic capacitor, typically 1 f, placed as close as possible to the device v cc pin works best. placing this decoupling capacitor close to the is31ap2005 is also important for the efficiency of the class-d amplifier, because any resistance or inductance in the trace between the device and the capacitor can cause a loss in efficiency. for filtering lower-frequency noise signals, a 10 f or greater capacitor placed near the audio power amplifier would also be helpful, but it is not required in most applications because of better psrr of this device.
is31ap2005 integrated silicon solution, inc. ? www.issi.com 11 rev.b, 12/11/2012 input capacitors (c in ) the input capacitors and input resistors form a high-pass filter with the corner frequency, f c , determined in equation (2). in in c r c f ? 2 1 ? (2) the value of the input capacitor is important to consider as it directly affects the bass (low frequency) performance of the circuit. speakers in wireless phones cannot usually respond well to low frequencies, so the corner frequency can be set to block low frequencies in this application. equation (3) is reconfigured to solve for the input coupling capacitance. c in f r in c ? 2 1 ? (3) if the corner frequency is within the audio band, the capacitors should have a tolerance of 10% or better, because any mismatch in capacitance causes an impedance mismatch at the corner frequency and below. for a flat low-frequency response, use large input coupling capacitors (1 f). however, in a gsm phone the ground signal is fluctuating at 217hz, but the signal from the codec does not have the same 217hz fluctuation. the difference between the two signals is amplified, sent to the speaker, and heard as a 217hz hum. summing input signals most wireless phones or pdas need to sum signals at the audio power amplifier or just have two signal sources that need separate gain. the is31ap2005 makes it easy to sum signals or use separate signal sources with different gains. many phones now use the same speaker for the earpiece and ringer, where the wireless phone would require a much lower gain for the phone earpiece than for the ringer. pdas and phones that have stereo headphones require summing of the right and left channels to output the stereo signal to the mono speaker. summing two differential input signals two extra resistors are needed for summing differential signals (figure 14). the gain for each input source can be set independently by equations (4) and (5). 1 1 150 2 1 in in o r k gain v v ? ? ? ? ? ? ? ? ? ? v v (4) 2 2 150 2 2 in in o r k gain v v ? ? ? ? ? ? ? ? ? ? v v (5) figure 14 application circuit with summing two differential inputs if summing left and right inputs with a gain of 1v/v, use r in1 = r in2 = 300k ? . if summing a ring tone and a phone signal, set the ring-tone gain to gain2 = 2v/v, and the phone gain to gain1 = 0.1v/v. the resistor values would be. r in1 = 3m ? , and r in2 = 150k ? . summing a differential input signal and a single-ended input signal figure 15 shows how to sum a differential input signal and a single-ended input signal. ground noise may couple in through in- with this method. it is better to use differential inputs. the corner frequency of the single-ended input is set by c in2 , shown in equation (6). to assure that each input is balanced, the single-ended input must be driven by a low-impedance source even if the input is not in use. the gain for each input source can be set independently by equations (4) and (5). 2 2 2 2 1 c in in f r c ? ? (6) if summing a ring tone and phone signals, the phone signals should use the differential inputs while the ring tone should use the single-ended input. the phone gain is set at gain1 = 0.1v/v, and the ring-tone gain is set to gain2 = 2v/v, the resistor values would be r in1 = 3m ? , and r in2 = 150k ? . the high pass corner frequency of the single-ended input is set by c in2 . if the desired corner frequency is less than 20hz. hz k in c 20 150 2 1 2 ? ? ? ? (7) pf c in 53 2 ? (8)
is31ap2005 integrated silicon solution, inc. ? www.issi.com 12 rev.b, 12/11/2012 figure 15 application circuit with summing differential input and single-ended input signals summing two single-ended input signals the corner frequencies (f c1 and f c2 ) for each input source can be set independently by equations (9) and (10). resistor, r p , and capacitor, c p , are needed on the in+ terminal to match the impedance on the in- terminal (figure 16). the gain for each input source can be set independently by equations (4) and (5). the single-ended inputs must be driven by low impedance sources. 1 1 1 2 1 c in in f r c ? ? (9) 2 2 2 2 1 c in in f r c ? ? (10) 2 1 in in p c c c ? ? (11) 2 1 2 1 in in in in r r r r p r ? ? ? (12) 4 in- in+ 3 c p c in1- r p r in1- c in2- r in2- single-ended input 1 single-ended input 2 figure 16 application circuit with summing two single-ended inputs
is31ap2005 integrated silicon solution, inc. ? www.issi.com 13 rev.b, 12/11/2012 classification reflow profiles profile feature pb-free assembly preheat & soak temperature min (tsmin) temperature max (tsmax) time (tsmin to tsmax) (ts) 150c 200c 60-120 seconds average ramp-up rate (tsmax to tp) 3c/second max. liquidous temperature (tl) time at liquidous (tl) 217c 60-150 seconds peak package body temperature (tp)* max 260c time (tp)** within 5c of the specified classification temperature (tc) max 30 seconds average ramp-down rate (tp to tsmax) 6c/second max. time 25c to peak temperature 8 minutes max. figure 17 classification profile
is31ap2005 integrated silicon solution, inc. ? www.issi.com 14 rev.b, 12/11/2012 packaging information dfn-8
is31ap2005 integrated silicon solution, inc. ? www.issi.com 15 rev.b, 12/11/2012 msop-8 note: all dimensions in millimeters unless otherwise stated.
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